Goals
- Understand SIMD (Single Instruction, Multiple Data)
- Implement Vector Addition using SIMD
- Implement Matrix Multiplication using SIMD
- Explore Loop Unrolling
- Analyze Compiler Optimization
Goals
A RV32C Toy CPU running RVC instructions. (Individual Project)
Goals
Understand cache behavior and performance terminology through visualization tools in Venus.
Analyze different cache scenarios to predict and record hit rates.
Optimize a Gaussian Blur program focusing on memory access performance.
Learn to modify data structures to be more cache-friendly to reduce cache misses.
Large and Fast: Exploiting Memory Hierarchy
The Processor
Goals
Understand the structure of a shift and add multiplier.
Implement a non-pipelined 4-bit shift and add multiplier.
Implement a pipelined 4-bit shift and add multiplier.
A RV32C Toy CPU running RVC instructions. (Individual Project)
Goals
Learning advanced techniques to help you create more concise circuits within Logisim.
Feel free to do each part as separate sub-circuits in the same Logisim file.
Strengthening experience in designing circuits using Logisim.
以自由能原理为基础的体外神经元智能实验
The Basics of Logic Design